Optical links are finding increased use across a number of application spaces, including, for example, chip-chip, board-board, data center/rack-rack, in Wide Area Network (WAN) fiber-optic links, and the like. All of these links and networks are experiencing rapidly increasing growth of capacity. WAN capacity growth is reflected by individual channel data rate scaling from 10 Gbps, to 40 Gbps, to currently deployed 100 Gbps, and to future projections of 1000 Gbps channels. The same capacity growth demand is also observed for shorter interconnects, as demonstrated by active optical cables which currently have >100 Gb of capacity (4×25G, 10×10G, etc.), and are scaling to 400 Gb capacity (16×25G, 8×56G, 40×10G, etc.). Conventional power and real estate concerns arise regarding the analog optoelectronic front end of optical receivers, which typically uses a Transimpedance Amplifier (TIA). TIAs have noise issues and also require a high gain-bandwidth product, which has to increase as the square of the signal bandwidth growth, and hits the so-called “transimpedance limit,” Eduard Sackinger, “The Transimpedance Limit,” IEEE Transactions on Circuits and Systems—I: Regular Papers, vol. 57, no. 8, August 2010, severely complicating the process of further receiver bandwidth expansion.
An integrate-and-dump receiver with a conventional structure is well known. It requires an electronic reset function on every single input bit, thereby limiting integration time and limiting the achievable data rate. Further, it implies that a robust clock is already available and fully synchronized with the incoming data stream. See, e.g., T. D. Gathman and J. F. Buckwalter, “A 45-nm SOI CMOS Integrate-and-Dump Optical Sampling Receiver,” IEEE Transactions on Circuits and Systems—I: Regular Papers, vol. 60, no. 2, February 2013. Also, optical wideband photodetectors are reaching very low capacitance and low dark current, see, e.g., C. T. DeRose, at al., “Ultra compact 45 GHz CMOS compatible Germanium waveguide photodiode with low dark current,” Optics Express, vol. 19, no 25, pp. 24897-24904, 5 Dec. 2011. Implementation targets and characteristics of very low power optical links are described in D. A. B. Miller, “Attojoule Optoelectronics for Low-Energy Information Processing and Communications—a Tutorial Review,” in arXiv:1609.05510 [physics.optics] 18 Sep. 2016.
Low power optical links are most efficient when using directly modulated lasers, such as Vertical-Cavity Surface-Emitting Lasers (VCSELs). However, this approach is very difficult to implement reliably for tight integration with Application Specific Integrated Circuits (ASICs) due to the substantial heat generated by ASICs and corresponding laser degradation. Solutions with tight ASIC integration have focused on using external Continuous Wave (CW) laser sources positioned in thermally benign environments, and separate modulators tightly coupled to ASICs.
Currently, optical on-chip and chip-to-chip links have been implemented with Non-Return to Zero (NRZ) modulation. This format is well known and is easy to understand and implement. Many options for modulators are available, including Mach-Zehnder Interferometers (MZI), Rings, and Electro-Absorption types. However, NRZ signaling fundamentally wastes 3 dB of optical power, assuming an external CW laser is modulated. Recently, Pulse Amplitude Modulation (PAM4) links have seen development. These actually make overall link power consumption worse, as they require 3× (˜5 dB) higher optical power for 2× data rate increase to maintain a fixed link performance.
Receivers are implemented with PIN (p-type, intrinsic, and n-type semiconductor) photodetectors, followed by TIAs to improve receiver sensitivity. Another factor contributing to excessive complexity, real estate, and power dissipation is the TIA-based receiver architecture, which employs a TIA front-end stage facing highly demanding limits of gain-bandwidth product, which has to grow as the square of the signal bandwidth increases (so-called “transimpedance limit”), followed by multiple broadband gain post-TIA stages. It is possible to improve receiver sensitivity using Avalanche photodetectors. But such approaches require high voltages and special photodetector structures, either of which is hard to realize in Complementary Metal-Oxide-Semiconductor (CMOS) technology. Similarly, optical preamplifiers can increase receiver sensitivity, but require a III/V material system separate from CMOS, and are also complex and generally inefficient.